Leading-Edge Phase-Cut Dimmer Detector

ABSTRACT

Circuits and methods for detecting the presence of a leading-edge phase-cut dimmer. The dimmer detector comprises an edge detector, a pulse stretcher and a filter. The edge detector detects whether an input signal has a rapidly rising edge and generates an output signal pulse if a rapidly rising edge is detected. If the edge detector outputs a signal pulse, the pulse stretcher generates a stretched pulse having a duration that is longer than the signal pulse received from the edge detector. The filter produces a dimmer detect signal that indicates whether a leading-edge phase-cut dimmer is detected. If the pulse stretcher output signal comprises at least a predetermined number of stretched pulses within a predetermined amount of time, the dimmer signal signals the presence of a leading-edge phase-cut dimmer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. Nonprovisional patentapplication Ser. No. 14/272,023, filed May 7, 2014, which claimspriority to U.S. Provisional Patent Application Ser. No. 61/832,654,filed Jun. 7, 2013, the entire contents of which is hereby incorporatedby reference in its entirety.

BACKGROUND

Electronic systems utilize dimmers to modify output power delivered to aload. For example, in a lighting system, dimmers provide an input signalto a lighting system, and the load includes one or more light sourcessuch as one or more light emitting diodes (LEDs). Dimmers can also beused to modify power delivered to other types of loads, such as one ormore motors or one or more portable power sources. The input signalrepresents a dimming level that causes the lighting system to adjustpower delivered to a lamp, and, thus, depending on the dimming level,increase or decrease the brightness of the lamp. Many different types ofdimmers exist. In general, dimmers use a digital or analog coded dimmingsignal that indicates a desired dimming level. For example, phase-cutdimmers modulate a phase angle of each cycle of an alternating currentsupply voltage. Modulating the phase angle of the supply voltage is alsocommonly referred to as “chopping” or “phase cutting” the supplyvoltage. Phase cutting the supply voltage causes the voltage supplied toa lighting system to rapidly turn on and off thereby controlling theaverage power delivered to the lighting system. There are two main typesof phase-cut dimmers. One is the leading-edge phase-cut dimmer, which isusually based on a triode for alternating current device (“triac”). Theother is the trailing-edge phase-cut dimmer, which is typicallytransistor based. Leading-edge phase cut dimmers reduce power to theload by delaying the start of each half cycle. Trailing-edge phase-cutdimmers stop the cycle early, leading to a sharp trailing edge in termsof output voltage.

FIG. 1 depicts a lighting system 100 that includes an illustrativetriac-based leading-edge phase-cut dimmer 102. It is important to notethat FIG. 1 represents only one possible implementation of a triac-baseddimmer and that numerous other implementations are possible. FIG. 2depicts voltage graphs 200 associated with the lighting system 100.Referring to FIGS. 1 and 2, the lighting system 100 receives an ACsupply voltage V_(SUPPLY) from voltage supply 104. The supply voltageV_(SUPPLY), indicated by voltage waveform 202, is, for example, anominally 60 Hz/110 V line voltage in the United States of America or anominally 50 Hz/220 V line voltage in Europe. Triac 106 acts asvoltage-driven switch, and a gate terminal 108 of triac 106 controlscurrent flow between the first terminal 110 and the second terminal 112.A gate voltage V_(G) on the gate terminal 108 will cause the triac 106to turn ON and current I_(DIM) when the gate voltage V_(G) reaches afiring threshold voltage value V_(F) and a voltage potential existsacross the first and second terminals 110 and 112. The dimmer outputvoltage V_(DIM) is zero volts from the beginning of each of half cycles202 and 204 at respective times t₀ and t₂ until the gate voltage V_(G)reaches the firing threshold voltage value V_(F). Dimmer output voltageV_(DIM) represents the output voltage of dimmer 102. During timer periodT_(OFF), the dimmer 102 chops the supply voltage V_(SUPPLY) so that thedimmer output voltage V_(DIM) remains at zero volts during time periodT_(OFF). At time t₁, the gate voltage V_(G) reaches the firing thresholdvalue V_(F), and triac 106 begins conducting. Once triac 106 turns on,the dimmer voltage V_(DIM) tracks the supply voltage V_(SUPPLY) duringtime period T_(ON). Once triac 106 turns on, triac 106 continues toconduct current I_(DIM) regardless of the value of the gate voltageV_(G) as long as the current I_(DIM) remains above a holding currentvalue I_(HC). The holding current value I_(HC) is a function of thephysical characteristics of the triac 106. Once the current I_(DIM)drops below the holding current value I_(HC), i.e., I_(DIM)<I_(HC),triac 106 turns off, i.e., stops conducting, until the gate voltageV_(G) again reaches the firing threshold value V_(F). The holdingcurrent value I_(HC) is generally low enough so that, ideally, thecurrent I_(DIM) drops below the holding current value I_(HC) when thesupply voltage V_(SUPPLY) is approximately zero volts near the end ofthe half cycle 202 at time t₂.

The variable resistor 114 in series with the capacitor 116 form a timingcircuit to control the time t₁ at which the gate voltage V_(G) reachesthe firing threshold value V_(F). Increasing the resistance of variableresistor 114 increases the time T_(OFF), and decreasing the resistanceof variable resistor 114 decreases the time T_(OFF). The resistancevalue of the variable resistor 114 effectively sets a dimming value forlamp 122. Diac 119 provides current flow into the gate terminal 108 oftriac 106. The diode bridge rectifier 118 rectifies the dimmer voltageV_(DIM) to generate rectified voltage VR 208. The LED load 122 comprisesone or more LED lamps such as lamps 124 and 126.

Ideally, modulating the phase angle of the dimmer output voltage V_(DIM)effectively turns the lamps 124 and 126 off during time period TOFF andon during time period TON for each half cycle of the supply voltageV_(SUPPLY). Thus, ideally, the dimmer 102 effectively controls theaverage energy supplied to the lamps 124 and 126 in accordance with thedimmer output voltage V_(DIM). However, when the lamps 124 and 126 drawonly a small amount of current (e.g., when the lamps 124 and 126 arerelatively low wattage lamps), the current I_(DIM) can prematurely dropbelow the holding current value I_(HC) before the supply voltageV_(SUPPLY) reaches approximately zero volts. When the current I_(DIM)prematurely drops below the holding current value I_(HC), the dimmer 102prematurely shuts down, and the dimmer voltage V_(DIM) prematurely dropsto zero. When the dimmer voltage V_(DIM) prematurely drops to zero, itdoes not reflect the intended dimming value as set by the resistancevalue of variable resistor 114. For example, when the current I_(DIM)drops below the holding current value I_(HC) at time t₃ for the dimmervoltage V_(DIM) 206, the ON time period T_(ON) prematurely ends at timet₃ rather than at time t₂, thereby decreasing the amount of energydelivered to lamps 124 and 126. Thus, the energy delivered to lamps 124and 126 will not match the dimming level corresponding to the dimmervoltage V_(DIM). Additionally, the triac 106 of leading-edge dimmer 102can re-engage (conductive) and disengage (non-conductive) repeatedlyduring a half-cycle of supply voltage V_(SUPPLY) when the currentI_(DIM) is below or near the holding current value I_(HC).

Measures can be taken to mitigate the above-described non-idealoperating characteristics of a leading-edge phase-cut dimmer. For thatreason, it would be advantageous to know when a leading-edge phase-cutdimmer is present. In general, dimmers do not directly communicate theirdimmer type to other circuits that could benefit from knowing the dimmertype.

SUMMARY

One embodiment of the present invention is directed to a circuit fordetecting a leading-edge phase-cut dimmer, the circuit including an edgedetector, a pulse stretcher and a filter. The edge detector receives aninput signal, detects whether the input signal has a rapidly risingedge, and generates an edge detector output signal. The edge detectoroutput signal comprises a signal pulse if a rapidly rising edge isdetected in the input signal. The pulse stretcher receives the edgedetector output signal and generates a pulse stretcher output signal. Ifthe edge detector output signal comprises a signal pulse, the pulsestretcher output signal comprises a stretched pulse having a durationthat is longer than the signal pulse received from the edge detector.The filter receives the pulse stretcher output signal and generates afilter output signal. If the pulse stretcher output signal comprises atleast a predetermined number of stretched pulses within a predeterminedamount of time, the filter output signal indicates the presence of aleading-edge phase-cut dimmer.

Another embodiment of the present invention is directed to a method fordetecting a leading-edge phase-cut dimmer. Pursuant to the method, it isdetermined whether a received input signal has a rapidly rising edge. Ifa rapidly rising edge is detected in the input signal, a signal pulse isgenerated. The signal pulse is stretched to generate a stretched pulsehaving a duration that is longer than the signal pulse. If at least apredetermined number of stretched pulses are generated within apredetermined amount of time, a signal indicating the presence of aleading-edge phase-cut dimmer is generated.

Another embodiment of the present invention is directed to a circuit fordetecting a leading-edge phase-cut dimmer. The circuit includes alight-emitting diode, an edge detector, a pulse stretcher, a filter, anda loading circuit. The light-emitting diode is driven by an LED driversignal. The edge detector receives the LED driver signal, detectswhether the LED driver signal has a rapidly rising edge, and provides anedge detector output signal. The edge detector output signal comprises asignal pulse if a rapidly rising edge is detected in the LED driversignal. The pulse stretcher receives the edge detector output signal andprovides a pulse stretcher output signal. If the edge detector outputsignal comprises a signal pulse, the pulse stretcher output signalcomprises a stretched pulse having a duration that is longer than thesignal pulse received from the edge detector. The filter receives thepulse stretcher output signal and generate an indicator signal. If thepulse stretcher output signal comprises at least a predetermined numberof stretched pulses within a predetermined amount of time, the indicatorsignal indicates the presence of a leading-edge phase-cut dimmer in acircuit generating the LED driver signal. The loading circuit receivesthe indicator signal. If the indicator signal indicates the presence ofa leading-edge phase-cut dimmer, the loading circuit provides a constantcurrent load to the light-emitting diode. If the indicator signalindicates the absence of a leading-edge phase-cut dimmer, the loadingcircuit provides a high power factor load to the light-emitting diode.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 depicts a prior-art lighting system that includes a triac-basedleading-edge phase-cut dimmer.

FIG. 2 depicts voltage graphs associated with the lighting system ofFIG. 1.

FIG. 3 is a block diagram representing a dimmer detector in accordancewith an illustrative embodiment of the present invention.

FIG. 4 is a circuit diagram illustrating an illustrative embodiment ofthe leading-edge phase-cut dimmer detector depicted in FIG. 3.

FIG. 5 is a timing diagram showing the timing relationships of varioussignals represented in FIG. 4.

FIG. 6 is a flowchart representing a method for detecting a leading-edgephase-cut dimmer in accordance with an illustrative embodiment of thepresent invention.

FIG. 7 is a circuit diagram of an LED lighting device in accordance withan illustrative embodiment of the present invention.

DETAILED DESCRIPTION

The present invention is directed generally to a method of and circuitryfor detecting a leading-edge phase-cut dimmer. FIG. 3 is a block diagramrepresenting a dimmer detector. The detection circuit 300 of FIG. 3receives at input V_(in) an LED driver signal that is to be provided toan LED lighting assembly, such as the signal V_(R) 120 that drives theLED lamps 124 and 126. The voltage divider 302, comprising resistors 304and 306, provides to edge detector 310 an input signal within a desiredvoltage range. Edge detector 310 will detect a rapidly rising edge inthe input signal and generate an output pulse when an edge is detected.In one embodiment, the edge detector will declare that an edge ispresent in the input signal when the signal includes a large enoughvoltage transition (0.5V, for example) with a rise time that is greaterthan a predetermined threshold (dv/dt>1V/100 μs, for example). Theoutput of the edge detector 310 is provided to pulse stretcher 320. Ifthe pulse stretcher 320 receives a pulse from edge detector 310, thepulse stretcher 320 stretches the pulse to a length that is determinedby the value of external capacitor C_(PS) 325, as will be described inmore detail below. The stretched pulse is provided to filter/reservoircircuit 330. The filter circuit 330 filters out low-frequency randomnon-periodic noise bursts. The filter 330 generates an output signalindicating the presence of a leading-edge phase-cut dimmer only after aseries of stretched pulses are received from the pulse stretcher 320.The number of stretched pulses that must be received in succession inorder for the presence of a leading-edge phase-cut dimmer to be declaredis determined by the value of the external capacitor 335, as will bedescribed in more detail below. When the filter 330 determines that aleading-edge phase cut dimmer is present, the filter output goes highand the latch 340 is set.

FIG. 4 is a circuit diagram illustrating an illustrative embodiment ofthe leading-edge phase-cut dimmer detector depicted in FIG. 3. It isimportant to note that FIG. 4 represents only one illustrativeimplementation of the dimmer detector of FIG. 3 and should not beconstrued to limit the scope of the present invention. The timingdiagram of FIG. 5 shows the timing relationships of various signalsrepresented in FIG. 4. The detection circuit 400 of FIG. 4 receives aninput signal V_(in) which is an LED driver signal that is to be providedto an LED lighting assembly. In an illustrative embodiment, the inputsignal V_(in) is received from a diode bridge rectifier 402, such as thediode bridge rectifier 118 of FIG. 1, which drives the LED lamps 124 and126. The voltage divider 404, comprising resistors 406 and 408, providesan input signal within a desired voltage range to a V_(AC) pin 412 ofedge detector 410. An illustrative input signal V_(AC) is represented bygraph 500 of FIG. 5. The input signal V_(AC) 500 shown in FIG. 5 isrepresentative of an input signal received from a leading-edge phase-cutdimmer. The edge detector 410 detects rapidly rising edges in the inputsignal V_(AC). The non-inverting input of comparator 414 receives theinput signal V_(AC) via resistor 416. The input signal V_(AC) is alsoapplied to an RC circuit comprising resistor 418 and capacitor 420 inseries. An offset voltage V_(io) 422 is applied to the signal taken fromthe junction of resistor 418 and capacitor 420 and the resulting signalis applied to the inverting input of comparator 414. Fast rising edgeson the V_(AC) pin 412 will immediately pull up the non-inverting inputof the comparator 414. The inverting input of the comparator 414 willlag due to the RC circuit. If the V_(AC) pulse has a large enough stepand rises fast enough to overcome the offset voltage V_(io) 422 and thelag, then the output of the comparator 414 will go high until the lagcatches up. This pulse would signal an input step event. If the rise onV_(AC) pin 412 is slow enough, the two inputs of comparator 414 willtrack each other and the output of the comparator 414 will remain low,signaling that no edge is detected. Graph 510 of FIG. 5 shows anillustrative output V_(ED) of the edge detector 410, i.e., the output ofcomparator 414. The illustrative edge detector output V_(ED) 510 shownin FIG. 5 includes a series of pulses 512-518 generated in response tothe edges in the input signal V_(AC) 500.

The pulse stretcher 430 receives any pulse generated by the edgedetector 410 and stretches it to a pulse having a longer, fixedduration. Prior to an input edge in the input signal at V_(AC) pin 412,C_(PS) pin 432 is held at ground. If an edge occurs in the input signalV_(AC), the resulting pulse generated by the edge detector 410 will setthe R-S latch 434, causing the output Q of the latch 434 to go high, asshown in graph 520 at 522, for example. With the latch 434 set, acurrent source 436 is connected to the C_(PS) pin 432 through switch 438and starts to charge the C_(PS) capacitor 440. In the illustrativeembodiment depicted in FIG. 4, the switch 438 is implemented as ann-channel field-effect transistor, and the source current source 436 is11 μA. The capacitor voltage V_(CPS) on pin 432 will rise at a ratedetermined by the capacitance value of the capacitor 440, as shown at532 of graph 530, e.g. When the voltage V_(CPS) surpasses apredetermined threshold, as shown at 534, e.g., of graph 530, the outputV_(PS) of the comparator 444 goes high, as shown at 542, e.g., of graph540. In the illustrative embodiment represented by FIGS. 4 and 5, thisthreshold is 0.1 V. When the voltage V_(CPS) surpasses a secondpredetermined threshold, the output of the comparator 442 goes high,thereby resetting the R-S latch 434. In the illustrative embodimentrepresented by FIGS. 4 and 5, this second threshold is 1.5 V. With theoutput Q of the R-S latch 434 returning to low, at 524 of graph 520,e.g., the transistor 438 is turned off and the C_(PS) pin 432 is pulledlow, as shown, e.g., at 534 of graph 530. With the voltage V_(CPS) atC_(PS) pin 432 once again being at a level of 0 V, the output V_(PS) ofthe comparator 444 goes low, as shown at 544, e.g., of graph 540. Sincethe value of the capacitor C_(PS) controls the rise rate of the voltageV_(CPS) across the capacitor, and therefore the amount of time that ittakes V_(CPS) to reach the voltage threshold of 1.5 V, the value of thecapacitor C_(PS) controls the length of time that the R-S latch 434remains set after being set by a pulse received from the edge detector410, and also the width of the stretched pulses V_(PS) output by thepulse stretcher 430.

The filter 450 filters the signal V_(PS) received from the pulsestretcher 430 and signals that a dimmer is detected if a predeterminednumber of stretched pulses are received in succession from the pulsestretcher 430. The output V_(PS) of the comparator 444 is coupled to thegate of switch 452. In the illustrative embodiment depicted in FIG. 4,the switch 452 is implemented as an n-channel field-effect transistor. Afirst current source 454 is coupled to the drain of transistor 452 and asecond current source 456, of lower magnitude than the first currentsource 454, is coupled to the source. In the illustrative embodimentdepicted in FIG. 4, the drain current source 454 is 11 μA and the sourcecurrent source is 1 μA. Therefore, any time that the output V_(PS) ofthe comparator 444 is high, signaling that an edge has been detected inthe input signal V_(AC), the transistor 452 is turned on and thecapacitor C_(DD) 458 is charged with a current of 10 μA (11 μA-1 μA).Conversely, any time that the output V_(PS) of the comparator 444 islow, the transistor 452 is turned off and the capacitor C_(DD) 458 isdischarged by the 1 μA current source 456. Therefore, the capacitorC_(DD) 458 charges 10 times faster than it discharges, as can be seen ingraph 550 of FIG. 5. The signal V_(CDD) present at pin 460 is providedto comparator 462. In the illustrative embodiment of FIG. 4, thecomparator 462 compares the signal V_(CDD) to a threshold voltage of 1.5V. When the V_(CDD) signal 460 surpasses 1.5V, the output of comparator462 goes high, signaling that a leading-edge phase-cut dimmer isdetected. It can be seen in graph 550 that it requires multiplestretched pulses from the pulse stretcher 430 to charge the capacitorC_(DD) 458 sufficiently to reach the 1.5 V threshold. Thus, in the eventthat low-frequency random non-periodic noise triggers the edge detector410, the filter 450 will filter the noise by requiring the detection ofmultiple pulses in succession, and in a predetermined frequency range,before declaring that a leading-edge phase-cut dimmer is detected. Thepulse width of the stretched pulses (which is determined by the size ofthe C_(PS) capacitor 440) and the size of capacitor C_(DD) 458 determinehow long, and therefore how many pulses from the pulse stretcher 430, itwill take to charge capacitor C_(DD) 458 enough to overcome the 1.5 Vthreshold.

Thus a user can customize the parameters of the detector 400 byselecting the values of the capacitors C_(PS) and C_(DD). This allowsthe user to determine the number of phase-cut edges that must bedetected in a certain amount of time in order to confirm that a dimmeris present. The C_(PS) capacitor 440 determines how long to charge theC_(DD) capacitor 458 per line cycle. The C_(DD) capacitor 458 determineshow many pulses are required to declare that a leading-edge phase-cutdimmer is detected. In an illustrative embodiment of the presentinvention, the C_(PS) capacitor 440 and the C_(DD) capacitor 458 areexternal to an integrated circuit package which houses all of theelements of FIG. 5 that reside on the other side of pins 412, 432, and460.

The output of comparator 462 is coupled to the clock input of a Dflip-flop latch 464. The D input of the D flip-flop 464 is coupled tothe power supply V_(DD). The output of the latch provides a dimmerdetect signal 466. Thus when the voltage V_(CDD) at pin 460 surpasses1.5 V, the clock input of the D flip-flop 464 goes high and the latch464 is set, signaling that a leading-edge phase-cut dimmer is detected.To reset the latch 464, a full power cycle of V_(DD) must occur.

FIG. 6 is a flowchart representing a method for detecting a leading-edgephase-cut dimmer. At step 600, an input signal, such as the V_(AC)signal 412 in FIG. 4, is received. At step 610, it is determined whetherthe received input signal has a rapidly rising edge. At step 620, if arapidly rising edge is detected in the input signal, a signal pulse isgenerated by the edge detector 410. At step 630, the pulse stretcher 430stretches the signal pulse received from the edge detector 410 togenerate a stretched pulse having a duration that is longer than theduration of the signal pulse generated by the edge detector 410. Thewidth of the stretched pulse is determined by the value of the C_(PS)capacitor 440. At step 640, if at least a predetermined number ofstretched pulses are generated by the pulse stretcher 430 within apredetermined amount of time, the filter 450 generates a signalindicating the presence of a leading-edge phase-cut dimmer.

In an illustrative embodiment of the present invention, the dimmerdetect signal generated by the leading-edge phase-cut dimmer detector isprovided to hardware and/or software which then uses the information tohelp optimize the performance of the LED lighting device. In oneembodiment, a constant current load is applied to the LED lightingdevice if a leading-edge phase-cut dimmer is detected, whereas a loadhaving a high power factor is applied if no leading-edge phase-cutdimmer is detected. This is done because triac-controlled leading-edgephase-cut dimmers require a minimum hold current in order to preventmisfire and flickering. But a constant current load results in poorpower factor and high THD (total harmonic distortion).

FIG. 7 is a circuit diagram of an LED lighting device according to anillustrative embodiment of the present invention. The leading-edgephase-cut dimmer detector 700 corresponds to the leading-edge phase-cutdimmer detector 300 in FIG. 3, and in one embodiment, is implemented asthe leading-edge phase-cut dimmer detector 400 of FIG. 4. The resistors706 and 708 form a resistive ladder in the same manner as the resistors406 and 408 in FIG. 4. The dimmer detect circuit 700 generates a dimmerdetect signal 704 which indicates whether the dimmer detect circuit 700has detected a leading-edge phase-cut dimmer. That is, dimmer detectsignal 704 indicates whether the input signal V_(in) 702 has beenreceived from, or generated by, or processed by, a leading-edgephase-cut dimmer. The dimmer detect signal 704 is provided to the selectinput of multiplexer 722 of reference generator 720. Illustratively, ifthe dimmer detect circuit 600 detects a leading-edge phase-cut dimmer,the dimmer detect circuit provides a logical “1” to the multiplexer 722,otherwise it provides a logical “0.” The reference generator 720generates a reference voltage that feeds into the linear regulator 730,which regulates the load current of the LED lighting device 710. The A₁input of the MUX 722 is coupled to a fixed reference voltage V_(REF).The reference voltage is also provided to a power factor correction PFCloop 724 that modifies V_(REF) with the rectified AC input signal V_(in)and provides the modified signal to the A₀ input of MUX 722. Themodified reference signal (A₀ MUX input) is generated by mixing thedivided-down V_(in) input and the output of the operationaltransconductance amplifier (OTA) 726. The output of mixer 728 has anaverage value equal to V_(REF) but has the shape of V_(in). The PFC loop724 allows the creation of a sinusoidal waveform in phase with V_(in)that does not change amplitude when the input voltage changes amplitude.

The output of the MUX 722 is provided to the linear regulator circuit730 that provides a load to the LED lighting device 710 comprising LEDs712 and 714. If the select input of the MUX 722 is high, indicating thepresence of a leading-edge phase-cut dimmer, the MUX outputs thereference voltage V_(REF) to the linear regulator circuit 730. If theselect input of the MUX 722 is low, indicating that a leading-edgephase-cut dimmer is not detected, the MUX provides the output of thepower factor correction loop 724 to the linear regulator circuit 730.The linear regulator determines what current to sink through the LEDstring based on the signal received from the reference generator 720.Error amplifier 732 takes the voltage across a current sense resistor734 and tries to make it the same as the reference generator voltage. Soinstead of regulating voltage, this regulates current. If the current istoo high the voltage across the current sense resistor 734 would behigher than the reference. The error amplifier 732 would then lower thegate voltage to try and get the feedback voltage (the voltage generatedacross the current sense resistor) back to the reference generatorvoltage. In the absence of a leading-edge phase-cut dimmer, high powerfactor correction is desired. Therefore, the current regulation willdepend on the output of the power factor correction loop 724 of thereference generator 720. This way the load to the line looks like aresistor (voltage and current waveforms are the same shape), thusproviding a high-power-factor load to the LED lighting device 710. Onthe other hand, when a leading-edge phase-cut dimmer is detected, thereference voltage is fixed DC so the current regulator 730 tries toregulate a fixed DC current, thus providing a constant current load tothe LED lighting device 710.

Having thus described circuits and methods for detecting a leading-edgephase-cut dimmer by reference to certain of its preferred embodiments,it is noted that the embodiments disclosed are illustrative rather thanlimiting in nature and that a wide range of variations, modifications,changes, and substitutions are contemplated in the foregoing disclosure.For example, while the switches 438 and 452 of FIG. 4 are implemented asn-channel field-effect transistors, it will be recognized that saidswitches can be implemented using any of a multitude of switchtechnologies. Furthermore, in some instances, some features of thepresent invention may be employed without a corresponding use of theother features. Accordingly, it is appropriate that the appended claimsbe construed broadly and in a manner consistent with the broad inventiveconcepts disclosed herein.

What is claimed is:
 1. A circuit for detecting a leading-edge phase-cutdimmer, comprising: an edge detector operable to receive an inputsignal, detect whether the input signal has a rapidly rising edge, andgenerate an edge detector output signal, wherein the edge detectoroutput signal comprises a signal pulse if a rapidly rising edge isdetected in the input signal; a pulse stretcher operable to receive theedge detector output signal and generate a pulse stretcher outputsignal, wherein if the edge detector output signal comprises a signalpulse, the pulse stretcher output signal comprises a stretched pulsehaving a duration that is longer than the signal pulse received from theedge detector; and a filter operable to receive the pulse stretcheroutput signal and generate a filter output signal, wherein if the pulsestretcher output signal comprises at least a predetermined number ofstretched pulses within a predetermined amount of time, the filteroutput signal indicates the presence of a leading-edge phase-cut dimmer.2. The circuit of claim 1, wherein the edge detector comprises: acomparator configured to receive the input signal at a first input ofthe comparator, the output of the comparator representing the edgedetector output signal; an RC circuit comprising a resistor having afirst end coupled to the input signal and a second end coupled to acapacitor; and an offset voltage source coupled to the junction of theresistor and the capacitor of the RC circuit, operable to add a voltageoffset to the signal present at the junction of the resistor and thecapacitor, and providing the resulting offset signal to the second inputof the comparator.
 3. The circuit of claim 1, wherein the pulsestretcher comprises a capacitor whose value determines the pulse widthof any stretched pulse generated by the pulse stretcher.
 4. The circuitof claim 1, wherein the pulse stretcher comprises: an R-S flip-flopcoupled to receive the edge detector output signal at its S input; aswitch coupled to receive the output of the R-S flip-flop at a firstterminal, wherein a voltage at said first terminal controls current flowfrom a second terminal of the switch to a third terminal of the switch;a current source supplying a fixed current to the second terminal of theswitch; a first comparator coupled to receive a signal present at thethird terminal of the switch, compare it to a first reference voltagelevel, and output a logical “1” if the signal present at the thirdterminal of the switch is greater than the reference voltage, the outputof the comparator being coupled to the R input of the R-S flip-flop; anda second comparator coupled to receive the signal present at the thirdterminal of the switch, compare it to a second reference voltage levellower than the first reference voltage level, and output a logical “1”if the signal present at the third terminal of the switch is greaterthan the reference voltage, the output of the second comparatorrepresenting the output of the pulse stretcher.
 5. The circuit of claim4, wherein the pulse stretcher further comprises a capacitor coupled tothe third terminal of the switch.
 6. The circuit of claim 1, wherein thefilter comprises a capacitor whose value in part determines the numberof stretched pulses that must be received from the pulse stretcherbefore the presence of a leading-edge phase-cut dimmer is declared. 7.The circuit of claim 1, wherein the filter comprises: a switch coupledto receive the pulse stretcher output signal at a first terminal,wherein a voltage at said first terminal controls current flow from asecond terminal of the switch to a third terminal of the switch; a firstcurrent source supplying a fixed current to the first terminal of theswitch; a second current source connected to the third terminal of theswitch and providing a fixed current flowing away from said thirdterminal, wherein a magnitude of the second current source is lower thana magnitude of the first current source; and a comparator coupled toreceive the signal present at the third terminal of the switch, compareit with a reference voltage level, and output a logical “1” if thesignal present at the third terminal of the switch is greater than thereference voltage.
 8. The circuit of claim 7, wherein the filter furthercomprises a capacitor coupled to the third terminal of the switch. 9.The circuit of claim 1, wherein the circuit further comprises a latchoperable to receive the filter output signal and to latch a filteroutput signal that indicates the presence of a leading-edge phase-cutdimmer.
 10. A method for detecting a leading-edge phase-cut dimmer,comprising: receiving an input signal; detecting whether the inputsignal has a rapidly rising edge; if a rapidly rising edge is detectedin the input signal, generating a signal pulse; stretching the signalpulse to generate a stretched pulse having a duration that is longerthan the duration of the signal pulse; and if at least a predeterminednumber of stretched pulses are generated within a predetermined amountof time, generating a signal indicating the presence of a leading-edgephase-cut dimmer.
 11. The method of claim 10, further comprising: if asignal indicating the presence of a leading-edge phase-cut dimmer isgenerated, providing a constant current load to an LED lighting device;and if a signal indicating the presence of a leading-edge phase-cutdimmer is not generated, providing a high-power-factor load to an LEDlighting device.
 12. A circuit for detecting a leading-edge phase-cutdimmer, comprising: a light-emitting diode driven by an LED driversignal; an edge detector operable to receive the LED driver signal,detect whether the LED driver signal has a rapidly rising edge, andprovide an edge detector output signal, wherein the edge detector outputsignal comprises a signal pulse if a rapidly rising edge is detected inthe LED driver signal; a pulse stretcher operable to receive the edgedetector output signal and provide a pulse stretcher output signal,wherein if the edge detector output signal comprises a signal pulse, thepulse stretcher output signal comprises a stretched pulse having aduration that is longer than the signal pulse received from the edgedetector; a filter operable to receive the pulse stretcher output signaland generate an indicator signal, wherein if the pulse stretcher outputsignal comprises at least a predetermined number of stretched pulseswithin a predetermined amount of time, the indicator signal indicatesthe presence of a leading-edge phase-cut dimmer in a circuit generatingthe LED driver signal; and a loading circuit configured to receive theindicator signal and, if the indicator signal indicates the presence ofa leading-edge phase-cut dimmer, provide a constant current load to thelight-emitting diode, and, if the indicator signal indicates the absenceof a leading-edge phase-cut dimmer, provide a high power factor load tothe light-emitting diode.
 13. The circuit of claim 12, wherein the edgedetector comprises: a comparator configured to receive the LED driversignal at a first input of the comparator, the output of the comparatorrepresenting the edge detector output signal; an RC circuit comprising aresistor having a first end coupled to the LED driver signal and asecond end coupled to a capacitor; and an offset voltage source coupledto the junction of the resistor and the capacitor of the RC circuit,operable to add a voltage offset to the signal present at the junctionof the resistor and the capacitor, and providing the resulting offsetsignal to the second input of the comparator.
 14. The circuit of claim12, wherein the pulse stretcher comprises a capacitor whose valuedetermines the pulse width of any stretched pulse generated by the pulsestretcher.
 15. The circuit of claim 12, wherein the pulse stretchercomprises: an R-S flip-flop coupled to receive the edge detector outputsignal at its S input; a switch coupled to receive the output of the R-Sflip-flop at a first terminal, wherein a voltage at said first terminalcontrols current flow from a second terminal of the switch to a thirdterminal of the switch; a current source supplying a fixed current tothe second terminal of the switch; a first comparator coupled to receivea signal present at the third terminal of the switch, compare it to afirst reference voltage level, and output a logical “1” if the signalpresent at the third terminal of the switch is greater than thereference voltage, the output of the comparator being coupled to the Rinput of the R-S flip-flop; and a second comparator coupled to receivethe signal present at the third terminal of the switch, compare it to asecond reference voltage level lower than the first reference voltagelevel, and output a logical “1” if the signal present at the thirdterminal of the switch is greater than the reference voltage, the outputof the second comparator representing the output of the pulse stretcher.16. The circuit of claim 15, wherein the pulse stretcher furthercomprises a capacitor coupled to the third terminal of the switch. 17.The circuit of claim 12, wherein the filter comprises a capacitor whosevalue in part determines the number of stretched pulses that must bereceived from the pulse stretcher before the presence of a leading-edgephase-cut dimmer is declared.
 18. The circuit of claim 12, wherein thefilter comprises: a switch coupled to receive the pulse stretcher outputsignal at a first terminal, wherein a voltage at said first terminalcontrols current flow from a second terminal of the switch to a thirdterminal of the switch; a first current source supplying a fixed currentto the first terminal of the switch; a second current source connectedto the third terminal of the switch and providing a fixed currentflowing away from said third terminal, wherein a magnitude of the secondcurrent source is lower than a magnitude of the first current source;and a comparator coupled to receive the signal present at the thirdterminal of the switch, compare it with a reference voltage level, andoutput a logical “1” if the signal present at the third terminal of theswitch is greater than the reference voltage.
 19. The circuit of claim18, wherein the filter further comprises a capacitor coupled to thethird terminal of the switch.
 20. The circuit of claim 12, wherein theloading circuit comprises a multiplexer configured to receive theindicator signal at its select input, wherein if the indicator signalindicates the presence of a leading-edge phase-cut dimmer, themultiplexer outputs a first signal that causes a constant current loadto be provided to the light-emitting diode, and, if the indicator signalindicates the absence of a leading-edge phase-cut dimmer, themultiplexer outputs a second signal that causes a high power factor loadto be provided to the light-emitting diode.